/*--------------------------------------------------------------------------------------------- SH7337/7355 CPG&BSC Register. for fx-9860G/II v1.01 copyright(c)2014,2015 by sentaro21 e-mail sentaro21@pm.matrix.jp ------------------------------------------------------------------------------- CPG(Clock Pulse Generator) quote: SH7705 datasheet ------------------------------------------------------------------------------- same as SH7705 It is thought that Clock Opereting Modes is mode 5. PLL(STC) PLL circuit Multiplication Ratio. base frequency 14.7456MHz at X'tal output. PLL circuit generates 29.4912MHz that doubled X'tal output. It is memory bus clock. default multiplication is x1. IFC Internal Clock Division Ratio. 00:1/1 default 01:1/2 10:1/3 11:1/4 This is CPU Clock. PFC I/O Clock Division Ratio. 00:1/1 01:1/2 default 10:1/3 11:1/4 ------------------------------------------------------------------------------- BSC(Bus State Controller) quote: SH7705 datasheet ------------------------------------------------------------------------------- register structure for the BCR/WCR similar to SH7705. CS0BCR, CS0WCR : FLASH ROM area CS2BCR, CS2WCR : main RAM area CS5ABCR,CS5AWCR : LCDC others unknown. CSn Space Bus Contorl Register (CSnBCR) (n=0,2,3,4,5A,5B,6A,6B) IWW: Specification for Idol Cycles between Write-Read/Write-Write Cycles. 00: no idol cycle 01: 1 idol cycle inserted 10: 2 idol cycles inserted 11: 4 idol cycles inserted (CS0BCR,CS2BCR)@SH7355 default value 0 idol cycles. lower frequency can modify more lower setteing. it work well effectively. IWRWD: Specification for Idol Cycles between Read-Write Cycles in Different Spaces. 00: 1 idol cycle inserted 01: 2 idol cycles inserted 10: 3 idol cycles inserted 11: 4 idol cycles inserted (CS0BCR,CS2BCR)@SH7355 default value 2 idol cycles. lower frequency can modify more lower setteing. it work well. but an effect is not felt. IWRWS: Specification for Idol Cycles between Read-Write Cycles in the Same Spaces. 00: 1 idol cycle inserted 01: 2 idol cycles inserted 10: 3 idol cycles inserted 11: 4 idol cycles inserted (CS0BCR,CS2BCR)@SH7355 default value 2 idol cycles. lower frequency can modify more lower setteing. it work well. but an effect is not felt. IWRRD: Specification for Idol Cycles between Read-Read Cycles in Different Spaces. 00: 1 idol cycle inserted 01: 2 idol cycles inserted 10: 3 idol cycles inserted 11: 4 idol cycles inserted (CS0BCR,CS2BCR)@SH7355 default value 2 idol cycles. lower frequency can modify more lower setteing. it work well. but an effect is not felt. IWRRS: Specification for Idol Cycles between Read-Read Cycles in the Same Spaces. 00: no idol cycle 01: 1 idol cycle inserted 10: 2 idol cycles inserted 11: 4 idol cycles inserted (CS0BCR,CS2BCR)@SH7355 default value 0 idol cycles. lower frequency can modify more lower setteing. it work well effectively. CSn Space Wait Contorl Register (CSnWCR) (n=0,2,3,4,5A,5B,6A,6B) WW: Number of Wait Cycles in Write Access 000: The same cycles as WR settings 001: 0 cycle 010: 1 cycle 011: 2 cycles 100: 3 cycles 101: 4 cycles 110: 5 cycles 111: 6 cycles (CS0WCR,CS2WCR)@SH7355 default value is the same cycles as WR settings. I think that it is not necessary to change it. but,set by independence becomes fast in the memory access. WR: Number of Wait Cycles in Read Access 0000: 0 cycle 1000: 10 cycles 0001: 1 cycle 1001: 12 cycles 0010: 2 cycle 1010: 14 cycles 0011: 3 cycles 1011: 18 cycles 0100: 4 cycles 1100: 24 cycles 0101: 5 cycles 0110: 6 cycles 0111: 8 cycles (CS0WCR,CS2WCR)@SH7355 default value is 2 cycles SW: Numer of Delay Cycles from Address,CSn Assertion to RD,WE Assertion. 00: 0.5cycle 01: 1.5cycles 10: 2.5cycles 11: 3.5cycles (CS0WCR,CS2WCR)@SH7355 default value is 0.5cycle. HW: Delay Cycles from RD WEn Negation to Address,CSn Negation. 00: 0.5cycle 01: 1.5cycles 10: 2.5cycles 11: 3.5cycles (CS0WCR,CS2WCR)@SH7355 default value is 0.5cycle. ---------------------------------------------------------------------------------------------*/ struct st_cpg { // struct CPG similar to SH7705 union { // FRQCR unsigned short WORD; // Word Access struct { // Bit Access unsigned short :3; // unsigned short CKOEN:1; // CKOEN unsigned short :2; // unsigned short STC :2; // STC unsigned short :2; // unsigned short IFC :2; // IFC unsigned short :2; // unsigned short PFC :2; // PFC } BIT; // } FRQCR; // }; // struct st_wdt { // struct WDT union { // WTCNT unsigned char READ; // Read Access unsigned short WRITE; // Write Access } WTCNT; // union { // WTCSR union { // Read Access unsigned char BYTE; // Byte Access struct { // Bit Access unsigned char TME :1; // TME unsigned char WTIT:1; // WT/IT unsigned char RSTS:1; // RSTS unsigned char WOVF:1; // WOVF unsigned char IOVF:1; // IOVF unsigned char CKS :3; // CKS } BIT; // } READ; // unsigned short WRITE; // Write Access } WTCSR; // }; struct st_bsc { unsigned long CMNCR; union { // struct CS0BCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS0BCR; union { // struct CS2BCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS2BCR; union { // struct CS3BCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS3BCR; union { // struct CS4BCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS4BCR; union { // struct CS5ABCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS5ABCR; union { // struct CS5BBCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS5BBCR; union { // struct CS6ABCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS6ABCR; union { // struct CS6BBCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :2; // unsigned long IWW :2; // IWW unsigned long :1; // unsigned long IWRWD:2; // IWRWD unsigned long :1; // unsigned long IWRWS:2; // IWRWS unsigned long :1; // unsigned long IWRRD:2; // IWRRD unsigned long :1; // unsigned long IWRRS:2; // unsigned long :1; // unsigned long TYPE :3; // TYPE unsigned long :1; // unsigned long BSZ :2; // BSZ unsigned long :9; // } BIT; } CS6BBCR; union { // struct CS0WCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS0WCR; union { // struct CS2WCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS2WCR; union { // struct CS3WCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS3WCR; union { // struct CS4WCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS4WCR; union { // struct CS5AWCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS5AWCR; union { // struct CS5BWCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS5BWCR; union { // struct CS6AWCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS6AWCR; union { // struct CS6BWCR similar to SH7705 unsigned long LONG; // long Word Access struct { // Bit Access unsigned long :13; // unsigned long WW :3; // WW unsigned long :3; // unsigned long SW :2; // SW unsigned long WR :4; // WR unsigned long WM :1; // WM unsigned long :4; // unsigned long HW :2; // HW } BIT; } CS6BWCR; }; #define CPG (*(volatile struct st_cpg *)0xFFFFFF80) // CPG Address #define WDT (*(volatile struct st_wdt *)0xFFFFFF84) // WDT Address #define BSC (*(volatile struct st_bsc *)0xA4FD0000) // CMNCR Address